Using 64 × 8 ROM chips with an enable input, construct a 512 × 8 ROM with eight chips and a decoder.

Using 64 × 8 ROM chips with an enable input, construct a 512 × 8 ROM with eight chips and a decoder.

The Correct Answer and Explanation is:

To construct a 512 × 8 ROM using 64 × 8 ROM chips with eight chips and a decoder, we need to arrange the chips and decoder correctly.


Correct Answer:

Use 8 of the 64 × 8 ROM chips and connect their enable inputs to the outputs of a 3-to-8 decoder. Feed the 3 most significant address lines (A6, A5, A4) into the decoder, and feed the remaining 6 address lines (A3 to A0 and A2 to A0, depending on naming) into each ROM chip.


🧠 Detailed Explanation (300+ words):

A 64 × 8 ROM means it has 64 memory locations (or addresses), each holding 8 bits of data. To access 64 locations, you need 6 address lines, because 26=642^6 = 64.

You want to build a 512 × 8 ROM, which means:

  • 512 memory locations
  • Each location stores 8 bits
  • To address 512 locations, you need 9 address lines because 29=5122^9 = 512

💡 Step-by-Step Construction:

  1. Number of Chips Needed:
    • Each chip can store 64 bytes.
    • 51264=8\frac{512}{64} = 8, so you need 8 ROM chips.
  2. Decoder Requirement:
    • You need to select one ROM chip at a time, based on the upper address bits.
    • A 3-to-8 decoder (like 74LS138) takes 3 input lines and activates one of 8 outputs.
    • Connect the 3 most significant bits of the address lines (A8, A7, A6) to the inputs of the decoder.
  3. ROM Enable Connections:
    • Connect each of the 8 decoder outputs to the enable (chip select) input of each ROM chip.
    • This ensures only one chip is active at a time.
  4. Address Lines to Chips:
    • Each chip still needs to know which of its 64 locations to access.
    • Connect the lower 6 address lines (A5 to A0) to the address inputs of all the ROM chips in parallel.
  5. Data Lines:
    • Connect the 8 data output lines from each chip to a common 8-bit data bus.
    • Only the enabled chip will drive the data bus (since only one chip is active).

✅ Summary:

  • Use a 3-to-8 decoder for selecting among 8 ROM chips
  • Use upper 3 address lines to drive the decoder
  • Use lower 6 address lines for ROM address inputs
  • Connect data outputs to a common bus
  • Result: A working 512 × 8 ROM system using eight 64 × 8 ROM chips
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