Design a magnitude comparator that takes two 2-bit binary numbers, A2A1 and B2B1, and determine their status based on below condition, • If two numbers are equal then EQUAL =1 • If A2A1 greater than B2B1 then GREATER = 1 • If A2A1 less than B2B1 then LESS = 1 This comparator circuit contains of FOUR inputs (A2A1 and B2B1) and THREE outputs (EQUAL, GREATER and LESS). (i) Derive the truth table for the above problem. (ii) Minimized the expression into simplified POS form using K-map.
Design a magnitude comparator that takes two 2-bit binary numbers, A2A1 and B2B1, and determine their status based on below condition, • If two numbers are equal then EQUAL =1 • If A2A1 greater than B2B1 then GREATER = 1 • If A2A1 less than B2B1 then LESS = 1 This comparator circuit contains of FOUR inputs (A2A1 and B2B1) and THREE outputs (EQUAL, GREATER and LESS). (i) Derive the truth table for the above problem. (ii) Minimized the expression into simplified POS form using K-map.
The Correct Answer and Explanation is:
To design a 2-bit magnitude comparator, we take two 2-bit binary inputs: A = A2A1 and B = B2B1. Each input can represent values from 0 to 3 (00 to 11 in binary). The outputs are:
- EQUAL = 1 when A = B
- GREATER = 1 when A > B
- LESS = 1 when A < B
(i) Truth Table
| A2 | A1 | B2 | B1 | A (dec) | B (dec) | EQUAL | GREATER | LESS |
|---|---|---|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
| 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 1 |
| 0 | 0 | 1 | 0 | 0 | 2 | 0 | 0 | 1 |
| 0 | 0 | 1 | 1 | 0 | 3 | 0 | 0 | 1 |
| 0 | 1 | 0 | 0 | 1 | 0 | 0 | 1 | 0 |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 |
| 0 | 1 | 1 | 0 | 1 | 2 | 0 | 0 | 1 |
| 0 | 1 | 1 | 1 | 1 | 3 | 0 | 0 | 1 |
| 1 | 0 | 0 | 0 | 2 | 0 | 0 | 1 | 0 |
| 1 | 0 | 0 | 1 | 2 | 1 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 2 | 2 | 1 | 0 | 0 |
| 1 | 0 | 1 | 1 | 2 | 3 | 0 | 0 | 1 |
| 1 | 1 | 0 | 0 | 3 | 0 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 | 3 | 1 | 0 | 1 | 0 |
| 1 | 1 | 1 | 0 | 3 | 2 | 0 | 1 | 0 |
| 1 | 1 | 1 | 1 | 3 | 3 | 1 | 0 | 0 |
(ii) K-Map Simplification (POS Form)
We derive simplified expressions for each output using Karnaugh Maps (K-maps) for 4 variables: A2, A1, B2, B1.
EQUAL (POS Form)
1 when A2A1 = B2B1 ⇒ for minterms: 0, 5, 10, 15
So, the POS (Product of Sums) expression is:
EQUAL = (A2 + A1 + B2 + B1)(A2 + A1′ + B2 + B1′)(A2′ + A1 + B2′ + B1)(A2′ + A1′ + B2′ + B1′)
GREATER (POS Form)
1 when A > B ⇒ minterms: 4, 8, 9, 12, 13, 14
Maxterms (0s): 0,1,2,3,5,6,7,10,11,15
GREATER = (A2 + A1 + B2 + B1)(A2 + A1 + B2 + B1′)(A2 + A1 + B2′ + B1)…
(Simplified POS expression by grouping zeros)
LESS (POS Form)
1 when A < B ⇒ minterms: 1, 2, 3, 6, 7, 11
Maxterms (0s): 0,4,5,8,9,10,12,13,14,15
LESS = (A2 + A1 + B2 + B1)(A2′ + A1′ + B2′ + B1′)…
Explanation
A magnitude comparator evaluates two binary numbers and determines their relationship: equal, greater, or less. In this design, we compare two 2-bit numbers: A (A2A1) and B (B2B1). Since each 2-bit number ranges from 0 to 3, we evaluate all 16 input combinations. The three output signals (EQUAL, GREATER, LESS) are mutually exclusive, meaning only one of them is active (1) for each input pair.
We first constructed a truth table listing all 16 possible input combinations and derived the corresponding outputs by comparing decimal values of A and B. For instance, if A = 10 (binary) and B = 01, then A > B ⇒ GREATER = 1.
After establishing the truth table, we simplified each output function using Karnaugh Maps (K-maps) and derived Product of Sums (POS) expressions. POS is suitable for designing circuits using NOR gates or when minimizing conditions where outputs are false (0). By grouping zeros in the K-map, we determine minimal logic expressions that represent the complement of the function and take its DeMorgan equivalent to obtain POS.
This approach reduces gate count and improves circuit efficiency. Finally, the resulting expressions can be used to implement the comparator in digital logic using standard logic gates. This design is fundamental in processors, sorting circuits, and arithmetic units where binary comparison is critical.
